1. Field of the Invention
The present invention relates to a power switching circuit including an output current detection terminal for detecting an output current that flows into an output transistor.
2. Description of Related Art
Power supply switching circuits mounted between a power supply and a load circuit are often used for controlling a current flowing from the power supply into the load circuit in order to reduce the power consumption of the system. In a power switching circuit, generally an output transistor is connected between a power supply and a load circuit. Then, by operating the output transistor as a switch, the current flowing from the power supply into the load circuit is controlled.
In such a power switching circuit, if an overcurrent flows into the output transistor due to a defect in the load circuit, a protection system is mounted for detecting the current and reducing or blocking an output current so as to protect the power switch circuit. The amount of the output current is firstly detected in such a protection system. An example of this output current detection method is disclosed in Japanese Unexamined Patent Application Publication No. 8-334534.
In Japanese Unexamined Patent Application Publication No. 8-334534, an output transistor is connected with a sense transistor in a mirror configuration, which has a similar configuration to the output transistor. Then, a current (sense current) proportional to an output current is obtained using the sense transistor to output to an external resistor (current sense resistor). In Japanese Unexamined Patent Application Publication No. 8-334534, by monitoring a detection voltage generated by the sense current and the current sense resistor, an overcurrent flowing into the output transistor is detected. Moreover, Japanese Unexamined Patent Application Publication No. 8-334534 discloses an amplifier which monitors a voltage of an output terminal and reflects the monitored voltage to a current output terminal of the sense transistor. The amplifier enables to have the same voltage in current output terminals (sources) of the output transistor and the sense transistor. Thus this improves the accuracy of the ratio of the sense current which is output from the sense transistor and an output current which is output from the output transistor.
Furthermore, when detecting an overcurrent flowing into the output transistor, the protection system needs to block the output transistor or reduce the output current. Such a control method of the output transistor is disclosed in Japanese Unexamined Patent Application Publication No. 8-222921. In Japanese Unexamined Patent Application Publication No. 8-222921, a current protector compares a reference voltage Vr with a voltage of an output terminal and detects an overcurrent according to the comparison result. Moreover, in Japanese Unexamined Patent Application Publication No. 8-222921, in case of detecting an overcurrent, after blocking an output transistor for a predetermined period using a latch and a timer circuits, the output transistor is operated again.
A power switching circuit 100 shown in FIG. 12 may be considered by combining the above Japanese Unexamined Patent Application Publication No. 8-334534 and Japanese Unexamined Patent Application Publication No. 8-222921. In the power switching circuit 100, an output controller 110 controls the conducting state of an output transistor OTr according to an output signal input from an input terminal IN. This drives a load RL which is connected to an output terminal.
Moreover, in the power switching circuit 100, a sense transistor STr which is connected with the output transistor OTr in a mirror configuration generates a sense current corresponding to an output current. Then, by passing the sense current to the current sense resistor RS, a detection voltage is generated in the output current detection terminal S. At this time, in the power switching circuit 100, a voltage of a current output terminal (source) of the sense transistor STr and a voltage of a current output terminal (source) of the output transistor OTr are made to be almost the same by an amplifier 111 and a transistor Tr1. This improves the accuracy of the ratio of the sense current and the output current.
Moreover, in the power switching circuit 100, the overcurrent detector 112 monitors the detection voltage generated in the output current detection terminal S so as to detect the overcurrent condition of the output transistor. In the overcurrent detector 112, a comparator 113 compares a reference voltage Vr with the detection voltage. If the detection voltage exceeds the reference voltage Vr, the overcurrent detector 112 outputs an overcurrent detection signal. This overcurrent detection signal is held for a certain period in a latch circuit 114 and a timer 115. Moreover, an inverter 116 is provided in order to ensure the compatibility of the logic of the overcurrent detection signal in the output controller 110.
Then, the power switching circuit 100 cuts off the output transistor OTr irrespective of the value of an input signal while the overcurrent detection signal indicates the overcurrent condition. The timing chart showing the operation of this power switching circuit 100 is shown in FIG. 13.
As shown in FIG. 13, in the power switching circuit 100, an output current Io increases in response to a rising edge of an input signal at the timing T101. Moreover, the detection voltage of the output current detection terminal S also increases with the increase of the output current Io. The timing chart shown in FIG. 13 shows no overcurrent condition.
On the other hand, the timing chart of the power switching circuit 100 when detecting an overcurrent is shown in FIG. 14. As shown in FIG. 14, at the timing T102, the output current Io increases in response to a rising edge of an input signal. Moreover, the detection voltage of the output current detection terminal S also increases with the increase of the output current Io. Then, if an overcurrent is generated at the timing T103 and the voltage of the output current detection terminal S reaches the reference voltage Vr, the overcurrent detector 112 detects an overcurrent condition and stops the output transistor OTr. After a certain period (OFF period in FIG. 14) by a timer, the power switching circuit 100 starts operating again at the timing T104 and the output current Io increases. If an overcurrent condition is generated again according to the state of the load RL at this time, the output transistor OTr stops at the timing T105 in the same way as the timing T103.